1. Technical Field
The present invention relates to a semiconductor device and a manufacturing method of a semiconductor device.
2. Related Art
In the conventional art, a trench semiconductor structure is known in which n+-type source regions and p+-type regions are alternately arranged along trench gates. In the trench semiconductor structure, the gaps between the trench gates are made smaller by omitting the p+-type regions to face the back surfaces of the n+-type source regions (see, for example, Japanese Patent Application Publication NO. 2012-114321).
Since the p+-type regions are not provided below the n+-type source regions in the conventional trench semiconductor structure, however, sufficient reverse biased safe operating area (RBSOA) cannot be assured if mask misalignment occurs for the n+-type source regions or the p+-type regions.